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Synopsys Announces Implementation and Verification IP for PCI Express Technology; New Additions to the DesignWare IP Portfolio Accelerate Adoption of PCI Express



MOUNTAIN VIEW, Calif.--(BUSINESS WIRE)--Feb. 12, 2003--Synopsys, Inc. (Nasdaq:SNPS), the world leader in integrated circuit (IC) design software, today announced new implementation and verification intellectual property (IP) to accelerate the adoption of the PCI Express interface standard.

"PCI Express promises to deliver significantly enhanced bandwidth at low cost for a wide variety of hardware platforms and applications," said Joachim Kunkel, vice president of marketing, Intellectual Property and Design Services at Synopsys. "The DesignWare(R) PCI Express implementation and verification IP will give the systems and semiconductor industry a low-risk path towards bringing standards-compliant products to market quickly and reliably."

"Timely availability of implementation and verification IP is critical to rapid development of new technology solutions," said Jason Ziller, technology manager from Intel's Corporate Technology Group. "With the broad industry focus on PCI Express product delivery, the need for PCI Express building blocks that enable IP is acute. Synopsys' release of implementation and verification IP is a major milestone and should help rapid deployment of PCI Express technology in the industry."

The DesignWare PCI Express Implementation IP Core is a synthesizable end-point solution that can be configured to address multiple applications, ranging from server and desktop systems to mobile devices. Licensees of the core will receive Verilog source code and example synthesis scripts as well as implementation guidelines for straightforward integration, including block placement information, list of critical paths, I/O driver requirements and technology requirements. The DesignWare PCI Express Core is being developed for flexibility, simplicity and reuse with a principal focus on configurability, reliability and low gate count.

The DesignWare PCI Express Verification IP significantly simplifies testbench development. It includes bus functional models for endpoint and switch, and a user-extensible monitor to validate protocol conformance and measure coverage. Verification engineers can take advantage of its built-in advanced constrained-random capabilities to generate thousands of transactions and test corner-case behavior with just a few commands. Written in OpenVera(TM), the DesignWare PCI Express Verification IP takes full advantage of the built-in Synopsys Smart Verification technology and has been implemented to be fully functional in Verilog, VHDL, and C-based verification environments.

Pricing and Availability

The DesignWare PCI Express Verification IP is currently in limited availability and is scheduled for general availability in the second quarter of calendar 2003. The DesignWare PCI Express Verification IP is included as part of the DesignWare Verification Library, which is priced at $9,800 for a one-year technology subscription license (TSL). Customers with a current DesignWare Library or DesignWare Verification Library license will have access to the DesignWare PCI Express Verification IP at no additional cost. In addition to the PCI Express Verification IP, the DesignWare Verification Library also includes verification IP for PCI, PCI-X, PCI-X 2.0, AMBA, USB, 14,000 memory models and other popular interfaces.

The DesignWare PCI Express Implementation IP is scheduled for availability in the second quarter of calendar 2003. For more information about the DesignWare PCI Express solution, or the extensive synthesizable and verification IP offerings from the DesignWare family of products, please visit http://www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq:SNPS) is the world leader in electronic design automation (EDA) software for integrated circuit (IC) design. The company delivers technology-leading IC design and verification platforms to the global electronics market, enabling the development of complex systems-on-chips (SoCs). Synopsys also provides intellectual property and design services to simplify the design process and accelerate time-to-market for its customers. Synopsys is headquartered in Mountain View, Calif., and is located in more than 60 offices throughout North America, Europe, Japan and Asia. Visit Synopsys online at http://www.synopsys.com/.

Synopsys and DesignWare are registered trademarks of Synopsys, Inc. All other trademarks or registered trademarks mentioned in this release are the intellectual property of their respective owners.

CONTACT: Synopsys, Inc.
             Troy Wood, 650/584-5717
             twood@synopsys.com
             or
             Edelman
             Andrea Zils, 650/429-2731
             andrea.zils@edelman.com

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